EE4815- Project 1 Description

EE4815/CS4515 - D97: Project 1

Simulating a Microprogrammable Machine

For this project, you are to simulate the microarchitecture described in class (and detailed in Chapter 4 of the Tanenbaum book) that executes the MIC-1 machine language. Since the MIC-1 instructions interpret MAC-1 programs, your simulator will indirectly be executing MAC-1 level programs. Follow these instructions carefully!

Project Requirements:

There are three specific requirements for this project:

You must write a program (preferably in C) that simulates the hardware that fetches, decodes, and executes MIC-1 microcode instructions.
You need an interpreter written in MIC-1 instructions that runs on your hardware simulator and interprets MAC-1 instructions. (This interpreter is represented in Figure 4-16. I give you a machine readable version, so this part is easy!).
You must create a few simple MAC-1 programs to test your simulator with.

The Hardware Simulator:

Your program must simulate all the actions of the hardware shown in Figure 4-10 including all the effects upon data flow of all control signals as shown in Figure 4-9 and described in Section 4.2 of the text.

Your simulator must:

Read into micromemory the microcode interpreter.
Read into macromemory a test MAC-1 program to be interpreted by the MIC-1 software (that in turn is having its execution simulated by your program.)
Begin fetching, interpreting, and executing the microinstructions.

MIC-1 microcode execution begins at location 0 in control store (micromemory). MAC-1 programs begin execution at location 0 in main memory (macromemory). Although the text talks about 4096 16-bit words, only the first 256 locations of MAC-1 memory should be simulated. The MAC-1 stack begins at location 255 and grows from high memory addresses to low memory addresses. (Be careful - what should the initial value of the stack pointer be?)

There must be a way to stop execution of the MIC-1 instructions (and hence your simulator). To do this, Tanenbaum's MIC-1 and MAC-1 machines have been extended by adding a halt microinstruction and a halt macroinstruction. The halt macroinstruction is FFFF (hex). When it is encountered, the machine should terminate execution.

NOTE: The halt macroinstruction is not interpreted by the book's microprogram (Figure 4.16). However, the microcode interpreter that you are given does interpret the halt macroinstruction. The halt macroinstruction decodes to a halt microinstruction which uses the unused bit pattern of 3 in the SH field. Hence, the halt microinstruction looks like 02600000000 (octal) or 00010110000000000000000000000000 (binary).

In addition, your simulation program MUST count the number of microinstructions executed, the number of macromemory reads, the number of macromemory writes, and the total number of macroinstructions that are executed.

Remember:

The 1, 0, -1, AMASK, and SMASK "registers" contain hardwired values and thus are not writable.
The address width is exactly 12 bits.
Although only 256 bytes of memory exist in the system, the processor may attempt to access its entire address space. Assume in this system that the first 8 address lines go to memory and that the rest are left unconnected (ie, aliasing will occur).
Registers are numbered from top to bottom with respect to figure 4-8. That is, PC = 0, AC = 1, SP = 2, and so on until F = 15.
Certain of the internal registers must be initialized correctly on "power-up."
The data bus is exactly 16 bits.

Items to turn in:

You are to submit an executable version of your project. If you write your program on an IBM-PC, you are to turn in the executable program on a 3 1/2" high-density floppy (check your floppy for viruses. If a virus is detected on a submitted disk, it will be returned unexecuted and ungraded). If you are working on a UNIX (DECStation) platform, you must provide read and execute access to the program and email me the location so that I may retrieve it or execute it from your account.

Since the executable will be run on test programs of my choosing (you’ll never see the test programs!) your program must read and write specific types of files in a particular way. Specifically, your program must execute with the following command line:

mac1sim [microcode] [input file] [output file]

where

microcode is a microcode input file in the format produced by mic1asm (same format as the file I provide you.
input file is a test program assembled using macasm.
output file is the test result in the format attached to this document.

Just like in the real world, you only have to deliver a working processor. It will either pass my tests or it will fail just as it would in the field (remember the Pentium!).

Unlike the real world, however, you have the option of providing additional "support" information for your product. In the event that your processor "fails" I will use this support information to help debug what was apparently a beta version of your processor and will assess partial credit based on the severity of the "bug." This support information must be a well-written, well-organized report that describes the project. This report must include:

A detailed description of your program including a flow diagram that illustrates what goes on in each section of the code.
A section with your experimental results included. These results consist of two memory/register dumps for the test programs you ran along with the comment source code of each test. The first dump must show the test code loaded and the memory/machine state immediately prior to execution and the second should show the memory/machine state that exists when the halt instruction is executed.
An appendix containing a source listing of your simulator.

Your program must print in hexadecimal a well-labeled dump of all registers (including but not limited to: MAR, MBR, MIR, MPC, ...) and macro memory before and after test program execution. The macromemory dump must be formatted to look like the example included in this handout.

Your program must also print in decimal the number of macromemory reads, the number of macromemory writes, the total number of macroinstructions executed and the total number of microinstructions executed.

Example Output File Format

Output of S94P1T1.HEX
Memory and Register Content ==> BEFORE <== Execution

Address Range	Dump of Core memory
00-07	601d fe02 8004 d006 7000 601b 8003 d00a
08-0f	7000 601b 7000 9001 7001 9000 8004 c01a
10-17	501a 8001 a003 9001 7001 a000 9000 b004
18-1f	c011 5011 8001 fc02 f800 7032 2031 f000
20-27	703c 2031 f000 e001 fc02 f400 7050 2031
28-2f	f200 0031 2030 1031 7009 3031 401d ffff
30-37	0001 0000 000c 0060 00e0 0291 0157 0017
38-3f	00ff 0015 0006 0003 00df 0001 0216 052d
40-47	0017 0209 1920 0070 00eb 0007 0000 0000
48-4f	0000 0000 0000 0000 0000 0000 0000 0000
50-57	0000 0000 0000 0000 0000 0000 0000 0000
58-5f	0000 0000 0000 0000 0000 0000 0000 0000
60-67	0000 0000 0000 0000 0000 0000 0000 0000
68-6f	0000 0000 0000 0000 0000 0000 0000 0000
70-77	0000 0000 0000 0000 0000 0000 0000 0000
78-7f	0000 0000 0000 0000 0000 0000 0000 0000
80-87	0000 0000 0000 0000 0000 0000 0000 0000
88-8f	0000 0000 0000 0000 0000 0000 0000 0000
90-97	0000 0000 0000 0000 0000 0000 0000 0000
98-9f	0000 0000 0000 0000 0000 0000 0000 0000
a0-a7	0000 0000 0000 0000 0000 0000 0000 0000
a8-af	0000 0000 0000 0000 0000 0000 0000 0000
b0-b7	0000 0000 0000 0000 0000 0000 0000 0000
b8-bf	0000 0000 0000 0000 0000 0000 0000 0000
c0-c7	0000 0000 0000 0000 0000 0000 0000 0000
c8-cf	0000 0000 0000 0000 0000 0000 0000 0000
d0-d7	0000 0000 0000 0000 0000 0000 0000 0000
d8-df	0000 0000 0000 0000 0000 0000 0000 0000
e0-e7	0000 0000 0000 0000 0000 0000 0000 0000
e8-ef	0000 0000 0000 0000 0000 0000 0000 0000
f0-f7	0000 0000 0000 0000 0000 0000 0000 0000
f8-ff	0000 0000 0000 0000 0000 0000 0000 0000


Register Contents	Register	Contents
pc	0000	amask	0fff
ac	0000	smask	00ff
sp	0100	a	0000
ir	0000	b	0000
tir	0000	c	0000
0	0000	d	0000
+1	0001	e	0000
-1	ffff	f	0000


Output of S94P1T1.HEX
Memory and Register Content ==> AFTER <== Execution

Address Range	Dump of Core memory
00-07	601d fe02 8004 d006 7000 601b 8003 d00a
08-0f	7000 601b 7000 9001 7001 9000 8004 c01a
10-17	501a 8001 a003 9001 7001 a000 9000 b004
18-1f	c011 5011 8001 fc02 f800 7032 2031 f000
20-27	703c 2031 f000 e001 fc02 f400 7050 2031
28-2f	f200 0031 2030 1031 7009 3031 401d ffff
30-37	0001 000a 000c 0060 00e0 0291 0157 0017
38-3f	00ff 0015 0006 0003 00df 0001 0216 052d
40-47	0017 0209 1920 0070 00eb 0007 0000 0000
48-4f	0000 0000 0000 0000 0000 0000 0000 0000
50-57	0a74 0060 d340 487d 1ed1 2ecf 06e0 0930
58-5f	0582 0015 0000 0000 0000 0000 0000 0000
60-67	0000 0000 0000 0000 0000 0000 0000 0000
68-6f	0000 0000 0000 0000 0000 0000 0000 0000
70-77	0000 0000 0000 0000 0000 0000 0000 0000
78-7f	0000 0000 0000 0000 0000 0000 0000 0000
80-87	0000 0000 0000 0000 0000 0000 0000 0000
88-8f	0000 0000 0000 0000 0000 0000 0000 0000
90-97	0000 0000 0000 0000 0000 0000 0000 0000
98-9f	0000 0000 0000 0000 0000 0000 0000 0000
a0-a7	0000 0000 0000 0000 0000 0000 0000 0000
a8-af	0000 0000 0000 0000 0000 0000 0000 0000
b0-b7	0000 0000 0000 0000 0000 0000 0000 0000
b8-bf	0000 0000 0000 0000 0000 0000 0000 0000
c0-c7	0000 0000 0000 0000 0000 0000 0000 0000
c8-cf	0000 0000 0000 0000 0000 0000 0000 0000
d0-d7	0000 0000 0000 0000 0000 0000 0000 0000
d8-df	0000 0000 0000 0000 0000 0000 0000 0000
e0-e7	0000 0000 0000 0000 0000 0000 0000 0000
e8-ef	0000 0000 0000 0000 0000 0000 0000 0000
f0-f7	0000 0000 0000 0000 0000 0000 0000 0000
f8-ff	0000 0000 0000 0004 0015 0024 0007 0015



Register Contents	Register	Contents
pc	0030	amask	0fff
ac	ffff	smask	00ff
sp	0100	a	fff5
ir	ffff	b	0000
tir	ff80	c	0000
0	0000	d	0000
+1	0001	e	0000
-1	ffff	f	0000

124647 microinstructions were executed. 13473 macroinstructions were executed. 
There were 20172 memory reads and 3360 writes.